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A hardware implementation of a qEEG-based discriminant function for brain injury detection

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posted on 2022-09-02, 10:17 authored by Fotios Kostarelos
This thesis provides a state-of-the-art overview of Electroencephalogram (EEG) and its biomedical applications specific to the development of a biometric signal-processing platform with an important aim for targeting Traumatic Brain Injury (TBI) diagnosis. The outcome of this work is an initial development of a real-time hardware implementation of a system using EEG as a tool for TBI detection. An injury to the brain tissue is caused by an external force and disrupts the normal function of the brain. The consequences of TBI for society and for each person individually can be immense. A TBI can have physical, cognitive, social emotional and behavioural complications on the patient. Some of these complications might persist for long time after the injury thus making difficult the daily life of people who have experienced it. Notably, 50% of all TBIs are motor vehicle accidents. Given that motor vehicle accidents occur too often, the importance of a device to be used by first responders is obvious. So, the ultimate goal in terms of broader research is to work towards a multi-modal platform exploiting additional health indicators such as cranial blood pressure, to be used by first responders in cases of emergency, like road accidents and first aid for athletes. Specifically, this thesis uses the power and cross-power spectrum modalities of EEG signals to extract suitable features relevant to a TBI event. These features which are alternatively called quantitative-EEG (qEEG) variables, are the indicators of an injury in the brain, as they can “expose” even a subtle alteration in the power and the phase content of the signals. The combination of four key qEEG features which constitute the discriminant function are implemented onto hardware and is the key outcome of this work. A XILINX Zynq UltraScale+ FPGA SoC ZCU104 platform was used as a prototyping board for the hardware implementation of this system. The code for the hardware design was developed using the High-Level-Synthesis (HLS) design flow for each of the four qEEG parameters. Also, this work utilized the Direct Memory Access (DMA) of the ZCU104 board in order to achieve a real-time performance for the discriminant function logic design.

History

Degree

  • Master (Research)

First supervisor

Mullane, Brendan

Second supervisor

MacNamee, Ciaran

Note

peer-reviewed

Language

English

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