A proposed new architecture for embedded systems development based on IEC 61499 function blocks

Today’s automation and control networks are typically viewed as networks of devices and the necessary software developed piecemeal from each individual device’s perspective. The IEC 61499 standard defines a generic architecture and presents guidelines for the use of function blocks in distributed industrial-process measurement and control systems. With IEC 61499, systems are modelled as networks of function blocks. Application models are constructed independent of the resources to which they will ultimately be deployed. Deployment models describe how application models should be divided up amongst the resources of the network. IEC 61499 applications can be constructed as layers of functionality and deployments can then be constructed as compositions of those layers. IEC 61499 solutions can be modelled independent of their physical realisation resulting in great re-usability of design artefacts. An embedded solution comprises one or more embedded devices which when configured and deployed in unison serve to deliver the solution to some higher level requirement. Furthermore, it is quite common for devices to be internally composed of one or more micro-processors and/or one or more Field Programmable Gate Arrays (FPGAs). The processors themselves may even be composed of multiple processor cores and the FPGAs may include one or more so called soft processor cores. The author proposes that such systems can be viewed as networks of resources and that IEC 61499 based techniques can be applied in the development of embedded systems at both the network level and at the device level. A platform facilitating the design and implementation of embedded systems using IEC 61499 models is presented herein. This platform makes it easy to create a model, perform initial simulation or testing on a PC and subsequently deploy it to an embedded target. Furthermore, the embedded target can be changed, altered, modified, etc. and the solution redeployed with the absolute minimum of effort. The presented platform allows IEC 61499 models to be deployed as homogenous or heterogeneous networks of devices and computing technologies. Models can be deployed to a single hardware platform, e.g. an embedded microprocessor or a PC. Alternatively, they can be distributed across multiple different hardware platforms, e.g. part of the solution on an FPGA and part of the solution on a microprocessor. The presented platform consists of an IEC 61499 editor, a compiler toolchain and a runtime engine. Central to this platform is a proposed new architecture allowing IEC 61499 models to be deployed as custom logic within an FPGA, as software on various micro-processors and operating systems, or as a mixture of both. Any IEC 61499 compliant editor can be used to construct application models. The compiler toolchain converts these application models to their custom logic and/or software equivalent representation. For a pure custom logic solution, the compiler’s output consists of a set of source modules and an FPGA tool specific project file. For a pure software solution, the output consists of a set of source modules, a runtime engine and a GNU Make compliant makefile. For a mixed solution, a mix of the above outputs is generated. For software solutions the runtime engine delivers core functionality and behaviour described in the IEC 61499 standard. For custom logic solutions this is provided by the compiler generated outputs.