Enhancements for digital control of switch mode power supplies: Bi-directional data-links, state dependent ADC encoding and advanced digital pulse width modulation schemes
thesisposted on 2022-08-22, 10:38 authored by Martin Josef Scharrer
Modern isolated switched mode power supplies (SMPSs) commonly utilise digital control methods over their classical analogue counterparts. These methods are now preferred for ease of programmability and implementation, scalability and they also accommodate advanced control techniques such as adaptive control. However in most digital implementations, inexpensive opto-couplers are still used to transmit analogue signals across the isolation barrier. It is well known that these types of opto-couplers suffer many drawbacks including variable gain due to ageing effects. The main research contribution in this thesis focuses on developing and implementing a full bi-directional digital data-link between both sides of the isolation barrier, i.e. all signals (feedback and auxiliary) are digitalised and transmitted as a single encoded data stream across the isolation barrier. A key advantage of this scheme is that only a single set of digital couplers is required to achieve bi-directional communication, when compared with its analogue counterpart which would require multiple opto-couplers. This proposed scheme is therefore a more cost-effective and efficient solution and does not suffer from performance degradation due to ageing effects. To reduce the size and improve power efficiency and loop response, switching frequencies are continually increasing. Higher switching frequencies reduce the transmission window and therefore the number of bits to be transmitted across the isolation barrier per switching cycle needs to be minimised. To achieve this objective for the bi-directional data-link proposed, a new state-dependent encoding scheme for the required analogue-to-digital converter (ADC) has been specifically designed. This state-dependent encoding scheme ensures a high resolution during the steady-state operation of the SMPS while still providing adequate accuracy during transients. Along with the state-dependent ADC, two digital pulse width modulators (DPWMs) for single- and multi-phase SMPSs have been designed for use with the proposed communication system. These DPWMs were implemented using field programmable gate arrays (FPGAs), but are also suitable for application specific integrated circuits (ASICs). The DPWM designs only require a small number of logic elements while achieving high speed and high resolution, temperature independence and good scalability. This has been achieved using a hybrid approach which uses a novel fine-resolution block along with a coarse resolution block. This approach takes advantage of digital clock manager (DCM) blocks available on most commercial FPGAs available today. Manual placing and routing techniques result in high linearity and monotonic behaviour. For test purposes, the bi-directional communication scheme has been implemented on FPGAs and verified using a custom-built SMPS board.