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Hierarchical synthesis system with hybrid DLO-MOGA optimization
Date
2011
Abstract
The purpose of this paper is to present a hierarchical circuit synthesis system with a hybrid deterministic local optimization multi-objective genetic algorithm (DLO-MOGA) optimization scheme for system-level synthesis. Design/methodology/approach - The use of a local optimization with a deterministic algorithm based on linear equations which is computationally efficient and improves the feasibility of designs, allows reduction in the number of MOGA generations required to achieve convergence. Findings - This approach reduces the total number of simulation iterations required for optimization. Reduction in run time enables use of full transistor-level models for simulation of critical system-level sub-blocks. Consequently, for system-level synthesis, simulation accuracy is maintained. The approach is demonstrated for the design of pipeline analog-to-digital converters on a 0.35 mu m process. Originality/value - The use of a hybrid DLO-MOGA optimization approach is a new approach to improve hierarchical circuit synthesis time while preserving accuracy.
Supervisor
Description
peer-reviewed
Publisher
Emerald Group Publishing Ltd.
Citation
Compel-The International Journal For Computation And Mathematics In Electrical And Electronic Engineering;30 (2), pp. 741-761
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Funding code
Funding Information
Sustainable Development Goals
External Link
Type
Article
Rights
https://creativecommons.org/licenses/by-nc-sa/1.0/