Realization of NumPy Tensordot using the field programmable gate array for embedded machine learning applications

Today, Machine Learning (ML) and Deep Learning (DL) functions are embedded into electronic systems enabling the inclusion of levels of system “intelligence” that otherwise could not be included using non-ML/DL approaches due to design considerations such as the required data processing times. Underlying the ML and DL operations are the necessary processing requirements, data storage (memory) and data structures (the format of the data). In addition, the manner in which the data is processed can be software based, hardware based, or a combination of software and hardware operations. In this paper, the Field Programmable Gate Array (FPGA) is considered to implement a FPGA based implementation of NumPy Tensordot in Python for computing the tensor dot product along specific axes for arrays greater than onedimension. The functionality will be implemented within an embedded Xilinx MicroBlaze processor targeting the Xilinx Artix-7 FPGA.